Sunday, 21 May 2017

[PreGSoC 2017] Make a port of RTEMS for HiFive1

The purpose of this post is to provide all available sources of information for everyone who is interested in my GSoC 2017 project "Utilizing full power from HiFive1 via usage of RTEMS on top of Freedom E310-G000 cores". Also, in this post other things will be described, such as the current state, available repositories and toolchains, plans for further involvement. 

Current state of the project

The previous work on the project was done by Hesham M. Almatary:

The main issues

The main organizational issue: how to change project in GSoC official page? should mentors do that or should I contact GSoC admins? For now, I have no ability to change the Final pdf. It is not an issue anymore - it was required only to change the title and the description. I have changed the title, the description and the draft.

My current vision of the project:
  • some low-level stuff should be modified to make RTEMS run on top of the actual hardware
  • UART and Clock drivers should be developed
  • may be SPI routine should be implemented
  • most of the tests should pass.
The main issue now is that I don't know to what extent current implementation for simulator should be changed. Another issue is that it is not clear how much tests will pass and how many time should be spent to make 90% of tests pass. 

Another resources

Here I listed another available resources:

No comments:

Post a Comment